{"id":299634,"date":"2025-06-17T23:37:50","date_gmt":"2025-06-17T23:37:50","guid":{"rendered":"https:\/\/peraltafinancing.com\/5g-technology\/oscillators-generate-clocks-through-digital-techniques\/"},"modified":"2025-06-17T23:37:50","modified_gmt":"2025-06-17T23:37:50","slug":"oscillators-generate-clocks-through-digital-techniques","status":"publish","type":"post","link":"https:\/\/fivemor.com\/?p=299634","title":{"rendered":"Oscillators generate clocks through digital techniques"},"content":{"rendered":"


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The MS1130 and MS1150 oscillators from Mixed-Signal Devices use digital architecture to produce low-noise, low-jitter clock signals.<\/em><\/p>\n

\"Mixed-SignalMixed Signal Devices (MSD) has introduced two clock generators designed for synchronizing signals in datacenters, telecom networks, and other digital communications systems. The MS1130<\/a> (10 MHz to 1 GHz) and MS1150<\/a> (20 MHz to 2 GHz) use a digital architecture that MSD\u2019s Avi Madisetti claims produce low noise clocks. As data rates increase, noise and jitter become harder to overcome.<\/p>\n

The block diagram shows how the devices use a digital sine generator, DAC, bulk acoustic wave (BAW) resonator, and a low-pass filter (LPF) to produce an output. MSD calls the BAW resonator a \u201cvirtual crystal.\u201d The digital sine generator produces a 16-bit word for each sample point of the waveform. The DAC converts each digital word into an analog voltage where the virtual crystal generates timestamps. The LPF smooths the signal by removing high-frequency content to produce the final output.<\/p>\n

\"Mixed-Signal<\/a><\/p>\n

In a call with EE World, Madisetti explained that the DAC generates analog voltage levels without creating the spurs typical in DACs. This, he said, is how the oscillators can produce low noise. See links above to datasheets for details. The devices use fully autonomous DSP algorithms that run in the background to continuously monitor the device, which ensures consistent performance over process, voltage, and temperature variations.<\/p>\n

When dealing with high-speed digital communication buses, jitter is of utmost importance. The MS1130 features RMS phase jitter 32 fs and the MS1150 features 30 fs of jitter when tested at 312.5 MHz. The temperature range is -40\u00b0C to 85\u00b0C with optional extended range to 105\u00b0C available.<\/p>\n

Currently, the output frequency is set at the factory though Madisetti said that future devices will be field programmable through an I2C interface.<\/p>\n

Packaged in 2.5 mm \u00d7 2.0 mm 6-pin land grid array (LGA) packages, both the MS1130 and MS1150 are available in sample quantities for engineering evaluation.<\/p>\n\n

Filed Under: IMS<\/a>, Oscillators<\/a>, Timing<\/a>, Timing ICs<\/a><\/span>
Tagged With: mixedsignaldevices<\/a><\/span>
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